1. Field of the Invention
The present invention relates to communication apparatuses, communication systems and adapters.
2. Description of the Related Art
IEEE 802.3, one of specifications for data communications between information apparatuses, has become widespread.
Meanwhile, PCI Express (registered trademark) specifications released as successor of the older peripheral component interconnect (PCI) specifications, which are specifications for high-speed local bus connection of personal computers (PCs), are known. PCI Express having, in addition to high data transfer rate, flexibility for adaptation to various application software is widely utilized in expansion boards, such as graphics cards. In recent years, more and more communications between different apparatuses are carried out by using communications protocol of PCI Express; cable adapters compliant with a PCI Express specification are also known.
A PCI Express has two pairs (each for upstream and downstream) of data wires, or, put another way, four data wires that make up a lane, allowing full-duplex bi-directional serial transfer, per lane. As effective transfer rate, PCI Express supports a data rate up to 250 megabytes per second (MB/s) in each direction, per lane. This means that PCI Express with eight lanes is capable of providing a 2 gigabytes/s (GB/s) of effective transfer rate in each direction.
Information apparatuses, such as work stations and PCs, with a socket compliant with a PCI Express specification have come onto the market.
For instance, a data processing system for performing functions of a PCI Express feature card located away from a data processing system is disclosed in Japanese Patent Application Laid-open No. 2008-65818. The data processing system includes a circuit board and the PCI Express feature card. As compared to the circuit board, the PCI Express feature card appears to be located away from the circuit board, while, viewed from the circuit board, the PCI Express feature card appears to be located at the circuit board architecturally.
Disclosed in Japanese Patent Application Laid-open No. 2009-94778 is a network system including a first computer with a first expansion interface, a first network interface card (NIC) device connected to the first expansion interface, a second computer with a second expansion interface, a second NIC device connected to the second expansion interface, and a network cable connected to the first NIC device and the second NIC device. In the network system, the first NIC device includes a transmission buffer unit for storing predetermined signals fed from the first expansion interface and a first transmission unit for transmitting the signals stored in the transmission buffer unit to the network cable at predetermined timing; the second NIC device includes a reception buffer unit for storing the signals fed via the cable and a second transmission unit for transmitting the signals stored in the reception buffer unit to the second expansion interface.
For PCI Express cabling technology, see “PCI Express External Cabling 1.0 Specification”, the PCI Special Interest Group (PCI-SIG), 26 Jan. 2007 (retrieved on 26 Jan. 2007 from the Internet: <URL: http://www.pcisig.com/specifications/pciexpress/pcie_cabling g1.0/>), which is a specification introduced in January 2007 by PCI-SIG, the organization responsible for specifying PCI Express.
PCI Express does not presume a device tree including a plurality of root complexes but presumes that the system has a device tree structure with a single root complex at the top. Accordingly, in typical application of PCI Express, communications between or among a plurality of hosts, each individually having a root complex, cannot be carried out.
As a solution to such a problem, vendors that provide switches (hereinafter, “PCI-e switches”) compliant with a PCI Express specification have introduced PCI-e switches with non-transparent port on the market. A non-transparent port is a port, through which an apparatus on the other end of communications is nontransparent. When two hosts are connected to each other via a non-transparent port of a PCI-e switch, initialization or the like of the hosts can be individually performed without interfering with each other; in addition, a main control entity (central processing unit (CPU)) of each of the hosts can access resources of the other one of the hosts while operating separately.
An example configuration where two hosts are connected to each other via a non-transparent port of a PCI-e switch is disclosed in Japanese Patent Application Laid-open No. 2008-67242. In Japanese Patent Application Laid-open No. 2008-67242, a configuration where each of an image processing unit (host) and an information processing unit (host) includes a data transfer unit so that the data transfer unit of the image processing unit and the data transfer unit of the information processing unit are connected to each other via a non-transparent port of a PCI-e switch to prevent a network from being occupied by data transfer from a digital multifunction periphery to any one of an external computer or the information processing unit.
However, the conventional configuration, in which the two hosts are connected to each other via the non-transparent port of the PCI-e switch is disadvantageous in that in a situation where, for instance, the two hosts are connected to each other with a cable, disconnecting the cable that connects the hosts together can result in system hang-up and that a restriction can be imposed on a startup order of the hosts. Hence, the conventional configuration provides unfavorable usability as a system for carrying out communications.
Meanwhile, it is determined that regulation regarding electromagnetic interference (EMI) that may be emitted by electronic equipment and a system including electronic equipment is becoming more stringent. Under such a circumstance, optical communication that emits less electromagnetic interference (EMI) even at relatively short distances (in a range from approximately one meter to some dozen meters) is likely to be more common.
For instance, in a conventional optical communication system, to carry out data communications between information apparatuses each having a socket compliant with a PCI Express specification, it is necessary for a sender, being one of the information apparatuses, to convert transmitting information from the PCI Express specification into the IEEE 802.3 specification to transmit the thus-converted information, while it is necessary for a receiver, being the other information apparatus, to convert the information fed from the sender from the IEEE 802.3 specification into the PCI Express specification to receive the information. This means that a chip for performing the conversion at high speed needs to be mounted on a communication adapter inserted into the socket compliant with the PCI Express specification, which disadvantageously increases cost. In addition, conversion into the IEEE 802.3 specification involves addition of various header information pieces, which disadvantageously decreases effective transfer rate.
Each of the data processing system disclosed in Japanese Patent Application Laid-open No. 2008-65818 and the network system disclosed in Japanese Patent Application Laid-open No. 2009-94778 puts no consideration for EMI.